Negative Bias Temperature Instability Dominated Degradation of Metal-Induced Laterally Crystallized p-Type Polycrystalline Silicon Thin-Film Transistors

Abstract

Device degradation of solution-based metal-induced laterally crystallized p-type polycrystalline silicon (poly-Si) thin-film transistors (TFTs) is studied under dc bias stresses. While typical negative bias temperature instability (NBTI) or electron injection (EI) is observed under -Vg or -Vd only stress, respectively, no typical hot carrier (HC) degradation can be identified under high -Vd stress combined with either low or high -Vg stress. Instead, mixed NBTI and EI degradation is observed under combined low -Vg and -Vd stresses; and combined degradation of NBTI and HC occurs under high -Vd and moderate -Vg stresses. NBTI is the dominant mechanism in both cases. Grain boundary (GB) trap generation is found to correlate with the NBTI degradation with the same time exponent, suggesting the key role of GB trap generation in poly-Si TFTs' degradation.