N-Curve Analysis of Low power SRAM Cell

Abstract

In this paper, a low power SRAM cell is proposed, whose leakage power is almost negligible compared to that of conventional 6T SRAM cell. All the stability parameters like static voltage noise margin(SVNM), static current noise margin(SINM), write trip voltage (WTV) and write trip current (WTI) are calculated using N-curve analysis. A better write stability is achieved for the proposed cell than 6T SRAM cell with a slight reduction in the read stability. The N-curves are plotted under different process corners and different temperatures. The standby power of the 6T SRAM cell and proposed SRAM cell is 6.22nW and 4.23uW respectively. Therefore, for low standby power applications the proposed cell is more suitable. Cadence tools are used for simulation of SRAM cells with gpdk 45-nm technology.