Abstract
For more than 10years a major part of MOSFET reliability publications are dealing with (N)BTI. The degradation and recovery mechanism is still not fully understood (Grasser, 2014). New publications demonstrate incessantly the agile debate on this important transistor aging phenomenon.In this paper we want to illuminate four important subareas for the understanding of NBTI. First, we will discuss experimental investigations. Depending on the pursued goal of the measurements different set-ups are required to gain the desired information. To get meaningful statements regarding the median NBTI degradation of MOSFET with a relatively small number of test devices, e.g. for regular lifetime predictions, DUTs with larger active area are used. The relatively high number of defects within one transistor delivers stable (averaged) parameter shifts with a small number of DUTs. Relatively small area devices are the best choice to investigate the physical nature of the degradation and recovery mechanisms. The small number of defects within those devices enables to obtain and investigate the trapping and de-trapping of single charges. To investigate the NBTI impact on the parameter variability array structures with a higher number of devices under test (DUTs) are appropriate. The very fast and strong recovery behavior of NBTI has to be considered for the test structure design and for the measurement set-up.Based on the measurement results and gained knowledge we can refine the modelling of the degradation and recovery mechanism. We could improve the understanding of the temperature dependence and utilize this knowledge to reduce measurement efforts for model calibration for a circuit aging simulator (Pobegen and Grasser, 2013). An adequately accurate model at a manageable effort for characterization and implementation is a key factor for a successful integration of an aging simulator in the design flow. A correct modelling of the parameter recovery during circuit function is especially challenging.The last chapter introduces a new method to verify the NBTI model and the correct implementation into a circuit aging simulator with real hardware measurements. An arbitrary waveform generator is used to drive single transistors in identical operation modes with identical sequence and proportion of each single operating point as during real circuit operation. In this manner, the calculated drift for one transistor in a circuit can be compared with a measurement drift for a given stress pattern.
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