Nature and origins of stacking faults from a ZnSe/GaAs interface

Abstract

Existence of ∼3–4 monolayers of Ga2Se3- and Ga2Te3-like interfacial layers are suggested by transmission electron microscopy of Se- and Te-exposed (or -reacted) ZnSe/GaAs interfaces, respectively. Densities of extrinsic Shockley- and intrinsic Frank-type stacking faults are of ∼5 ×107/cm2 in samples grown on Se- or Te-exposed GaAs surfaces. Annealing on the Se- or Te-exposed GaAs generated a high density of vacancy loops (⩾1×109/cm2) with an increase of the densities of both intrinsic and extrinsic-type stacking faults (⩾5×108/cm2) after growth of the films. Formation of the intrinsic stacking faults or vacancy loops and extrinsic stacking faults may be related to the presence of cation vacancies and interstitials, respectively, on the surface of the GaAs epilayer, due to the interaction between Se or Te and the GaAs epilayer with charge unbalanced Ga–Se or Ga–Te bondings. On the other hand, ∼2 and 3–4 monolayers of Zn–As interfacial layers are recognized in samples grown on Zn-exposed GaAs-(2×4) and -c(4×4), respectively. A very low density of fault defects in the range of ∼104/cm2 was obtained in samples with Zn treatment on an As-stabilized GaAs-(2×4). However, the density of As precipitates increases as the surface coverage of c(4×4) reconstruction increased on the Zn-exposed As-stabilized GaAs-(2×4) surface and this is associated with an increase of the density of extrinsic-type stacking faults bound by partial edge dislocations with a core structure terminated on additional cations. Clustering of excess As atoms and formation of Zn interstitials due to charge unbalance of Zn–As bondings on the GaAs surface may act as nucleation sites for the generation of the high densities of As precipitates and extrinsic-type stacking faults, respectively. These local stacking errors due to the interaction between Zn and GaAs-c(4×4) is reduced by thermal annealing. In this case, thickness of the Zn–As interfacial layer is decreased with increasing annealing temperature and a very low density of the fault defects is obtained.