Nanostructured compliant interconnections for advanced Micro-Electronic packaging

Abstract

The continuous drive for miniaturization and enhanced functionality in micro-electronic devices demands highly integrated circuit (IC) packaging. This trend leads to a dense network of micro-electronic packaging interconnections, facilitated by the reduction in traditional solder interconnection sizes. However, these advancements bring about significant challenges, including thermal expansion differences between materials used in the package and the presence of non-planar substrates. Such issues can lead to thermomechanical stresses in interconnections and warpage, resulting in serious reliability issues. In response, nanostructured compliant interconnections have emerged as a promising solution. These interconnections effectively manage thermal expansion variations and substrate non-coplanarity, mitigating the risks associated with miniaturization and high integration demands in IC packaging. This review explores the latest trends and advancements in developing nanostructured compliant interconnections for modern micro-electronics. The focus is on integrating various interconnection materials, including nanoparticles (via sintering), nanoporous materials, nanowires (NWs) and carbon nanotubes (CNTs). This integration aims to improve the performance and mechanical reliability of interconnections under extreme thermal loading conditions. Advanced bonding techniques and their significant impacts on interconnection reliability are also discussed. Additionally, the study provides insights into future developments of nanostructured compliant interconnections, guiding researchers toward specific technical areas for future exploration.