Nanosized-Metal-Grain-Induced Characteristic Fluctuation in 16 nm Complementary Metal–Oxide–Semiconductor Devices and Digital Circuits

Abstract

In this work, we investigate the effect of random work functions (WKs) resulting from the nanosized grains of a metal gate on 16 nm metal–oxide–semiconductor field-effect transistor (MOSFET) devices and circuits. The random number and position of nanosized metal grains induce rather different random WKs on a MOSFET gate, which cannot be modeled using an averaged WK; thus, we consider each WK of the metal gate, according to the size of partitioned grains, in three-dimensional device simulation. The results of this study indicate that the random-WK-induced threshold voltage fluctuation of N- and P-MOSFETs are about 1.5 and 1.6 times higher than the results calculated by the recently reported averaged WK fluctuation method. This is because even if the devices have similar threshold voltages, they may exhibit quite different combinations of WKs owing to the random position of nanosized metal grains on the devices' gate. Coupled device-circuit simulation is further adopted to explore the timing fluctuations of complementary metal–oxide–semiconductor (CMOS) inverter circuits. The random position of nanosized metal grains results in 10 and 12% variations in the timing fluctuation and power consumption of the CMOS inverter circuit.