Abstract
In this paper, for improving the analog performance of scaled MOS devices, structural design involving the integration of Dielectric Pocket (DP) and Dual Material Gate (DMG) onto the conventional MOSFET has been studied by means of Dual Material Gate Insulated Shallow Extension Gate Stack (DMG ISEGaS) MOSFET. Simulation results reveal that Dual Material Gate engineering down to 50 nm regime enhances the analog performance of the ISE architecture in terms of gm/IDS, early voltage (VEA) and intrinsic gain (gm/gd).
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