Abstract
AbstractSi‐nanoribbon‐based high‐performance field‐effect transistors (FETs) with room temperature (RT)‐deposited dielectric are presented. The distinct feature of these devices is that the high‐quality SiNx dielectric deposition at RT, directly on the transfer‐printed nanoribbons, is compatible with most flexible substrates. The performance of these FETs (mobility ≈656 cm2 V−1 s−1 and on/off ratio >106) is on par with the highest performance of similar devices reported with high‐temperature processes, and significantly higher than devices reported with low‐temperature processes. The transfer and output characteristics of nanoribbon‐based field‐effect transistors under planar, tensile, and compressive bending and multiple bending cycles (100) show excellent mechanical stability of the devices as they retain performance. The device characteristics are also compared with the equivalent simulation data. The excellent response of nanoribbon‐based FETs and the fabrication compatibility with diverse flexible substrates makes the presented approach attractive for flexible electronics applications such as conformal tactile active matrix sensors for e‐skin, where high performance is needed.
Highlights
Si-nanoribbon-based high-performance field-effect transistors (FETs) with compact areas as for economic reasons room temperature (RT)-deposited dielectric are presented
This paper presented the silicon nanoribbon-based FETs with room temperature deposited SiNx gate dielectric on flexible substrate and exhibiting excellent performance, which is at par with highest performing devices reported far
Si NRFETs have been realized using commercial SOI wafers, which consist of 70 nm top Si (100) layer over 2 μm of buried oxide, supported by 600 μm bulk Si (Figure S1, Supporting Information)
Summary
Si NRFETs fabrication process involves four major steps: 1) chemical etching, 2) n+ doping of source and drain regions, 3) transfer printing, and 4) FETs fabrication. The subthreshold swing (SS) was extracted from the logarithmic transfer characteristics by numerical differentiation based on the equation www.advelectronicmat.de room temperature ICP process adopted here for the deposition of high-quality dielectric (SiNx) of thickness 100 nm leads to enhanced device performance. This is evident from the distinctive enhanced performance of developed device in comparison with other devices based on RT deposited dielectric materials. The breakdown field strength of the dielectric was >2.2 MV cm−1, which is excellent for a room temperature deposited gate dielectric
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
