Abstract

Perpendicular Nanomagnetic Logic (pNML) is a computing concept, where the local magnetization and fringing fields of ferromagnets are used to store and process information. So far, pNML devices have been exclusively operated at millisecond time scales. In this work, pNML magnets are clocked by a planar on-chip inductor at frequencies ranging from 100 kHz to 10 MHz. The inherent switching field (SF) and SF distribution (SFD) of an individual magnet is determined. An Arrhenius equation is used in order to model the SFD. Furthermore, a magnetic power-clock, implemented by an on-chip inductor with ferromagnetic cladding, is proposed and analyzed by finite element simulations. With the extracted data, an estimate of the power density of a scaled pNML computing system is given.

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