Abstract

We have fabricated n-channel 25-nm gate length FinFETs with Schottky-barrier source and drain featuring a self-aligned ytterbium silicide (YbSi1.8). A low-temperature silicidation process was developed for the formation of the low electron barrier height YbSi 1.8 phase, without reaction with SiO2 isolation or SiN spacer materials, enabling integration in a CMOS fabrication process flow. The fabricated device exhibits good device characteristics with a drive current of 241 muA/mum at VDS=VGS-Vt=1 V, Ion/Ioff=104 at VDS=1.1 V, subthreshold swing of 125 mV/decade, and drain-induced barrier lowering of 0.26 V/V

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