Abstract
We have developed a CoC (Chip-on-Chip) packaging technology for high-reliability applications. Gold-to-Gold interconnects with Au stud bumps and plated Au bumps were used for the new technology. EBSP (Electron Backscatter Diffraction Patterns) were observed to estimate the Au‐Au bond formation mechanism, and the plasma treatment effect on the Au bump surface was clarified using AFM (Atomic Force Microscopy) and ESCA (Electron Spectroscopy for Chemical Analysis). Furthermore, we have investigated the mechanical damage and the influences on device characteristics of CoC interconnection processes using test chips with under-pad multi-layer wiring and transistors. Finally, we fabricated CoC structure packages including a single chip microcomputer and a memory chip, and successfully confirmed their excellent reliability.
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