Abstract

LSI suppliers have been making strong efforts to introduce LSI packages with lead free plating terminals. But, gull wing lead LSI packages still use Sn-Pb plating. Many papers report that the combination of Sn-Ag-Cu solder paste and Sn-Pb plating develops a low temperature layer on PWB copper pads and causes pad peel-off in the wave soldering process. This failure appears conspicuously in the case of low temperature solder alloys containing Bi such as Sn-Zn-Bi and Sn-Ag-In-Bi. This paper examines the composition of the low temperature layer and the peel-off limit temperature using an EPMA (Electron Probe Micro Analyzer), simulation software for the phase diagram, and an actual tensile test. As a result, the required control temperature for wave and selective soldering process is clarified.

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