Abstract
The write gate for Bloch line memory devices have been investigated by computer simulations and experiments. In the case of conventional gates where a write conductor is located at the stripe domain head, the computer simulation shows that the VBL-pair generation takes place in such a way that the horizontal wall magnetization between the generated VBL's is opposite in direction to the applied in-plane field Hip. As a result, the VBL's collapse easily when the write current is small. To overcome this shortcoming, a new write gate where the write conductor is located along the stripe domain wall has been designed and examined. In this gate. VBL's are stable because the generated VBL's have the horizontal magnetization in the same direction as Hip. While the current margin of a conventional gate is about 6%, the new gate has been confirmed experimentally to show a greatly improved current margin as high as 77% at Hip of 7 Oe.
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