Mutual Information based Efficient Spike Encoding on FPGA

Abstract

Spiking Neural Networks (SNN) coupled with Neuromorphic Computing is considered as a bio-plausible, power and data-efficient AI/ML technique especially suitable for resource-constrained edge devices such as robots, satellites, automated cars etc. While the performance of an SNN often suffers due to lossy spike encoding of real valued data, its implementation on actual hardware is also limited due to commercial unavailability of neuromorphic chips. While on one hand, better encoding techniques are being improvised, on the other hand, FPGAs (instead of ASICs) are nowadays considered as a plausible alternative for hardware implementation. In this paper, we have shown how a Mutual Information based information maximization technique for spike encoding can be successfully implemented on a Xilinx Zynq ZedBoard. The implemented system is found to perform at par with software simulation w a minimal error of 0.014 when tested on four different univariate time series. When running at a frequency of 200MHz, the system is observed to consume 0.018 watts (dynamic power), have a latency of 10.35 ms and a throughput of 96 samples/sec. Moreover, the FPGA-based system has the advantage of being used as a plug-and-play encoder device for any neuromorphic computing platform.