Abstract
Control of threshold voltage (V T) by asymmetric dual-gate structure is investigated. Two separated gates are successfully fabricated through two-step chemical mechanical polishing (CMP) processes. Silicon fin width is determined as same as the thickness of oxide sidewall spacer. V T of the device is modulated by how many charges are trapped in the nitride layer of the second gate stack (G2) through applying programming pulses to G2. They affect the formation of electron channel on the first gate (G1) side. Additionally, the efficiency of this technique is analyzed by simple capacitance network. The thinner body is the more effective the proposed V T control method is. It is noteworthy that this method can be used without ultra thin buried oxide (BOX) structure and additional biasing scheme.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
