Abstract
This paper presents a parallel router and a packet switching mechanism by merging IPv6 and asynchronous transfer mode (ATM) as the protocol for the quality of service (QoS) enabled Internet. The hardware architecture of the parallel router consists of N-general-purpose computers each combined with a newly designed inter-node communication unit. This parallel architecture provides the necessary speed required in cell switching for real-time applications. The IPv6 packet and ATM cell co-switching mechanism implemented by the router controlling software preserves the connectionless future for non-real-time applications and provides the QoS for real-time applications, through merging the IPv6 and ATM protocols. The IPv6 packet and ATM cell co-routing/switch mechanism is developed for the current parallel router and is presented along with the parallel hardware architecture.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
