Abstract
This paper proposes a totally multiplier-less farrow structure based linear phase low-pass interpolation filter. When implemented using farrow structure, it has inherently low number of multipliers and adders compared to that using finite impulse response (FIR) filter structure. To further reduce the implementation complexity, the structure is made totally multiplier-less. Canonic signed digit (CSD) representation of the filter coefficients is made use of in this paper. A meta-heuristic optimization algorithm is deployed to obtain optimal CSD representation. Reduction in the implementation complexity leads to lower power consumption, chip area and cost.
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