Multi-mode Toggle Random Access Scan to Minimize Test Application Time

Abstract

Random Access Scan (RAS) as a design-for-test technique gained importance recently with the ability to update each flip-flop independently. Thus, with this ability, the test application time reduces drastically in comparison to the traditional Serial Scan technique. In this paper, we have proposed a Multi-Mode Toggle RAS architecture that reduces the test application time using the T-Flip-Flop based cell design. More importantly, the proposed RAS architecture gives the ability to update multiple flip-flops together thereby leading to a reduction in test application time. In the proposed RAS architecture, there are two modes of operation in case of test mode. In direct test mode, multiple flip-flops will be toggled together, however, in the decoder test mode only one flip-flop will be toggled at a time. An algorithm for the placement of scan flip-flops is also proposed for optimal performance in the proposed architecture. Experimental results show an average of 56% reduction in test data volume as compared to the traditional RAS architecture. Also, on an average, a speedup of 2.7x in test application time is achieved.