Multi-line buffer based pipeline architecture with junction connectivity analysis for high frame rate and ultra-low delay contour-based corner detection

Abstract

High frame rate and ultra-low delay corner detection plays an increasingly important role in factory automated scenarios with a demand for accurate and robust corner features. However, classic intensity-based corner detection like the Harris method has limitations in determining corner types and parameter selection. Conventional contour-based corner detection like Chord to Triangular Arms Ratio (CTAR) method uses global level curve extraction based on the whole frame, leading to high delay. Achieving corner detection nearly simultaneous with capturing the same image provides a workable solution to minimize the delay. To modify the conventional detection methods which arbitrarily process any pixels within the scope of the entire input, a multi-line buffer based pipeline architecture is proposed. Using this pipeline, the whole frame is divided into lines processed independently. Junction connectivity analysis is proposed to define corner types based on the architecture. The proposed algorithm almost keeps the robustness (Average Repeatability of 0.5715, Localization Error of 0.4285) with the original CTAR method (AR of 0.5832, LE of 0.4374), better than the Harris method (AR of 0.5322, LE of 0.7324).