Multilevel integration of patternable low-κ material into advanced Cu BEOL

Abstract

In this paper, we wish to report, for the first time, on a simple, low-cost, novel way to form dual-damascene copper (Cu) on-chip interconnect or Back-End-Of-the-Line (BEOL) structures using a patternable low dielectric constant (low-κ) dielectric material concept. A patternable low-κ dielectric material combines the functions of a traditional resist and a dielectric material into one single material. It acts as a traditional resist during patterning and is subsequently converted to a low-κ dielectric material during a post-patterning curing process. No sacrificial materials (separate resists or hardmasks) and their related deposition, pattern transfer (etch) and removal (strip) are required to form dual-damascene BEOL patterns. We have successfully demonstrated multi-level dual-damascene integration of a novel patternable low-κ dielectric material into advanced Cu BEOL. This κ=2.7 patternable low-κ material is based on the industry standard SiCOH-based (silsesquioxane polymer) material platform and is compatible with 248 nm optical lithography. Multilevel integration of this patternable low-κ material at 45 nm node Cu BEOL fatwire levels has been demonstrated with very high electrical yields using the current manufacturing infrastructure.