Abstract
A new operation scheme is proposed for achieving multilevel storage in FinFET one-time programmable (OTP) cells by a high- $\kappa $ metal gate CMOS process. The OTP cells are programmed by breaking down the gate dielectric layer, during which the corner effect in the FinFET structure shortens the program time and lowers the program voltages. The after-breakdown resistance in the storage node is found to be well-controlled by the compliance current level set by the select transistor. By using WL voltage control, the multilevel OTP cell with superior data retention and disturb immunity is successfully used in advanced logic nonvolatile memory applications.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
