Abstract

Photonic Integrated Circuits (PICs) enable photons as data carriers at a very high speed. PIC market opportunities call for reduced wafer dimensions, power consumption and cost as well as enhanced reliability. The PIC technology development must cater for the latter relentless traits. In particular, monolithic PICs are sought as they can integrate hundreds of components and functions onto a single chip. InGaAsP/InP laterally-coupled distributed feedback (LC-DFB) lasers stand as key enablers in the PIC technology thanks to the compelling advantages their embedded high-order surface-gratings have. The patterning of the spatial corrugation along the sidewalls of the LC-DFB ridge, has been established to make the epitaxial overgrowth unnecessary thereby reducing the cost and time of manufacturing, and ultimately increasing the yield. LC-DFBs boast a small footprint synonymous of enhanced monolithic integrate-ability. Nonetheless, LC-DFBs suffer from the adverse longitudinal spatial hole burning (LSHB) effects materialized by typically quite high threshold current levels. Indeed, the carrier density longitudinal gradient- responsible for modes contending for the available material gain in the cavity- may be alleviated somewhat by segmenting the LC-DFB electrode into two or three reasonably interspaced longitudinal sections. In this work we report on the realization and performance of various electrode partition configurations. At room temperature, the experimental characterization of many as-cleaved LC-DFB devices provides ample evidence of superior performance such as a narrow linewidth (less than 400 kHz), a wide wavelength tune-ability (over 4 nm) and a hop-free single mode emission (side mode suppression ratio (SMSR) exceeding 54dB).

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