Abstract
The Burt pyramid is an efficient algorithm that produces a multiresolution bandpass representation of image information. Since the pyramid is a potentially powerful tool for advanced television image processing, a pyramid processor has been designed and constructed to perform both the decomposition and reconstruction processes of the algorithm on digitized television signals in real time. The processor features a novel cascaded-filter pipeline architecture that achieves the performance of high-order filters through the repetitive use of low-order filters by resampling. In addition, each successive lower-spatial-frequency band is calculated from previously computed bands, while the linear sampling density is reduced by two per dimension to eliminate redundant information that is wasteful of both memory storage and processing time. Because the architecture is modular, highly structured, and arithmetically well-behaved, it is attractive for VLSI implementation.
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