Abstract
In this paper we describe the activities towards the design of a common framework for the Instrument Control and Data Processing Units for the three scientific payload instruments on board the joint ESA-JAXA SPICA mission, currently at the end of its phase A study. In this context, we started a program to assess modular architectures based on the use of a quad-core fault-tolerant LEON4 SPARC V8 processor on a SpaceWire network. We will describe the results of our initial tests using both Asymmetric Multi processing (AMP) and Symmetric Multi Processing (SMP) configurations. In addition, the possibility to adopt the RTEMS real time operating system, already space qualified on single core processors, will be evaluated both in terms of latency performances and of dynamical allocation of the resources. Finally, we will present the outline of the way forward for the next phases of the SPICA project.
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