Multichip modules for RISC-based applications

Abstract

Reduced Instruction Set Computers (RISC) is one of the key technologies in the computer and embedded controller market of this decade. Increasing performance of RISC processors and growing user's comfort of application call also for large main memories with high bandwidths and access speeds. The constant improvement in semiconductor technology is able to produce ever smaller features, which in turn implies higher clock frequencies of RISC based computing systems. Today 50 MHz clock is possible. In two years 80-100 MHz RISC systems will be available. This requires Fast Static RAMs (FSRAM) with very short access times. At the above mentioned frequencies FSRAM access times are comparable to typical delay times on standard PCBs. Also standard packages like PGAs or CQITs cannot be used in RISC based systems, because their lead capacitance imposes a serious penalty on the RISC based processor system (ground bounce, reflections on the interconnect lines, increased signal delay, etc.). To reduce these inconveniences TAB, Flip-TAB or Flip-Chip packages are used. It is also compulsory to have shorter chip-to-chip interconnects, in order to reduce the values of the detrimental electrical parameters at the substrate level. Multichip Modules (MCM) using thin-film multilayer build-ups are the only adequate solution to the interconnect problem in RISC based computing systems. Thin-Film MCMs have the resolution of fine-line lithography and the reliability of traditional thin-film modules. Micro-vias connecting through thin polymer insulating layers offer very high tracking densities, with the possibility of impedance control with separate reference planes. Two signal layers with optionally separate reference (GND,Vcc) and pad layers are adequate for all practical applications. We demonstrated that digital signals with a bitrate of 1000 Mbit/s are successfully transmitted over 10 centimeters, with very low crosstalk levels. A module with five conductor levels, one RISC processor, and two memory management units - that we developed for a central telephone switching unit - demonstrates the performance achieved through the combination of RISC processors and thin-film MCMs.