Abstract
This paper describes a DC to DC converter designed to meet the power supply requirements of the SiREUS Coarse Rate Sensor (CRS) which is a 3-axis MEMS Rate Sensor (MRS) that uses a resonating ring gyro and will be used in different ESA missions. The converter supplies +5V, −5V, 3.3V, 1.8V and 40V and it has been designed and prototyped by Clyde Space Ltd with the EQM and FM units being manufactured by Selex ES. The first model was designed for a 28V un-regulated bus and the second model presented here has been designed for a 50V regulated bus. PWM voltage regulation was not used because of the noise requirements and the regulated input bus allowed an unregulated power stage approach. There are also stringent volume and interface constraints, which also affected the design. For such reasons, a fixed dutycycle, quasi-resonant single-ended topology with output linear regulators has been implemented; having the advantages of providing low switching losses, low radiated and conducted noise and no over-voltage failure mode. This paper highlights the techniques used to satisfy stringent noise and protection requirements of the load.
Highlights
The Coarse Rate Sensor (CRS) is a 3.6W 3-axis rate sensor that is used continuously from just after launch to de-spin the spacecraft, until full ADCS stabilization is achieved
This paper describes a DC to DC converter designed to meet the power supply requirements of the SiREUS Coarse Rate Sensor (CRS) which is a 3-axis MEMS Rate Sensor (MRS) that uses a resonating ring gyro and will be used in different ESA missions
The first model was designed for a 28V un-regulated bus and the second model presented here has been designed for a 50V regulated bus
Summary
The CRS is a 3.6W (maximum) 3-axis rate sensor that is used continuously from just after launch to de-spin the spacecraft, until full ADCS stabilization is achieved. The PSU (Power Supply Unit) for the CRS must follow the low mass and low volume requirements imposed by the design of the sensor. Because the MRS is very sensitive to 14 kHz signals, a design requirement to minimize noise at that frequency, and at the third harmonic, has been imposed. Filtering such low frequencies requires relatively large input filter components which has a major impact on the physical implementation of the PSU. The load for the 1.8V output is 800mW and the minimum input voltage of the RHFL4913 is 3V This produced a 530mW hotspot on the PCB, which in turn, produced thermal issues in the CRS unit. A very fast current protection has been implemented on this 1.8V series regulator to protect the load, which is an FPGA, from Single Event Effects (SEE)
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