Multi-objective optimization for silicon wafer slicing using wire-EDM process

Abstract

Abstract The existing silicon ingot slicing methods adopt contact forces in slicing that could easily cause higher kerf loss and a larger variation in the thickness of the sliced wafers. Wire-EDM is a potential process for slicing of silicon ingots into wafers. This work therefore demonstrates capability of wire-EDM in silicon wafer slicing through a RSM based experimentation involving use of molybdenum wires of 40–120 μm in diameter. During the experiments wafers of various height ranging from 50 to 150 mm were fabricated and capability of the process was assessed in minimizing the kerf width. It was evident that the kerf width reduces from 250 μm to 50 μm, when sliced by a 40 μm diameter wire, which amounts to a reduction in kerf loss by 300%. The slicing speed on the other hand could be increased by 40–50% to 2.5 mm/min over the conventional abrasive slicing. A multi-objective optimization methodology adopted gives parametric conditions that give minimum kerf width at the highest slicing speed and the lowest surface roughness.