Multi level combinational circuits and hazard detection

Abstract

The author addresses static hazards in multi-level combinational logic circuits. A novel approach is introduced based on a uniform hybrid method that is capable of identifying race conditions and detecting all types of hazards: static, logic, function, and dynamic, that have the potential to exist in combinational logic circuits under given conditions. This method is based on a binary switching algebra, and uses hardware simulation techniques together with more formal symbol manipulation mechanisms in order to identify potential hazards in logic design. >