Abstract
In this paper an efficient algorithm using multi-frequency approach has been applied to fault diagnosis of analog electronic circuits using Pole Sensitivity analysis. In this paper, after application of the multi frequency approach to the pole sensitivity analysis the results show that the fault diagnosis of the circuit has increased. This has been proved by taking two circuits a second order Sallen Key Filter and RC Ladder network.
Highlights
The increasing complexity of the System–on-chip (SOC) makes it very important for the accuracy and consistency in timing analysis and clock distribution
The importance of the analog circuits is increasing, the main reason is that the digital systems need analog circuits to interface to the real world which is analog in nature
Analog Fault Diagnosis has been of immense research interest for the past three decades and continues to sustain the same zeal even today
Summary
The increasing complexity of the System–on-chip (SOC) makes it very important for the accuracy and consistency in timing analysis and clock distribution. The main challenges today in analog fault diagnosis are to design universally accepted fault models, cost effective, faster and accurate diagnosis of faults All this is desired even in the presence of inherent characteristics of analog circuits like tolerances, non-linearity and in- accessible test nodes etc. The hierarchical approach is used to compute sensitivity analysis and calculates responses in any sub circuit in the hierarchy Another multi frequency approach deals with the optimum selection of test points and frequencies [8]. Baoru et al in [10] proposed a tolerance analog circuit hard and soft fault diagnosis method based on adoptive learning rate and additional momentum algorithm BP neural network
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