Abstract
In this paper we present an overview of a family of Time-to-Digital Converter (TDC) systems developed at HYPRES over the past several years. We have developed three types of RSFQ-based time digitizing systems: an eight-channel multi-hit 30-ps TDC, a two-channel multi-hit 6-ps TDC, and a dual-function multi-hit TDC/ADC. We present results of successful testing of an all-digital TDC up to 33-GHz clock frequency, digitizing at 30-ps time intervals. The eight-channel all-digital TDC chip occupies a 1 cm /spl times/1 cm area with more than 10000 Josephson junctions. For better time resolution, the digital counter-based TDC can be integrated with an analog prescaler. The prescaler improves time resolution to 6 ps and has also been successfully tested. We have also integrated TDC channel with sensitive SQUID to a dual-function ADC/TDC digitizer. An advanced VXI-based interface allows the parallel 8-channel data to be acquired at a read-out clock rate of 100 MHz.
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