Abstract
HYPRES, Inc has successfully completed the development of the first-generation superconductor digital channelizing receiver. This channelizer circuit, comprising a single-bit digital in-phase and quadrature (I&Q) mixer and two second-order digital decimation filters (DDFs), was built with rapid single flux quantum (RSFQ) logic. The further development of digital-RF receivers requires a multi-bit (n × k) multiplier for digital mixing of n-bit data streams provided by advanced low pass or band pass modulator and k-bit digital local oscillator (LO). We report our results on the design of both n × 1-bit and 1 × k-bit mixers where either data or LO streams can have a multi-bit representation. The reported approach is the generalization of a 1 × 1-bit mixer used in the first-generation channelizer. The detailed block-diagrams are given for both types and the correct operation at low frequency of test chips with 3-bit mixers are reported. Design issues pertaining to scaling to a digital-RF receiver containing multi-bit mixers are discussed.
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