MSI High Speed Low Power GaAs Integrated Circuits

Abstract

A new planar, high density (10-3 mm2/gate) GaAs IC technology has been used for fabricating MSI digital circuits containing up to 75 gates per chip. These circuits consist of Schottky diode FET logic NOR gates, which have provided propagation delays in the 80–200 ps range with dynamic switching energies as low as 27 fJ/gate on ring oscillator structures. Power dissipation levels are compatible with future LSI/VLSI extensions. Operation of D-flip flops as binary ripple dividers (\\div2 to \\div8) was achieved at 1.9 GHz clock rates, and an 8: 1 full data multiplexer and 1: 8 data demultiplexer were demonstrated at 1.1 GHz clock rates. This corresponds to equivalent propagation delays in the 100 to 175 ps range for these MSI circuits. Finally, a 3×3 parallel multiplier containing 75 gates functioned with a propagation delay of 172 ps/gate and with average gate power dissipations of as low as 420 µW/gate.