Abstract
This paper reports the thermal stress-induced method to fabricate copper oxide nanowires on surfaces of various copper-containing substrates, including multi-layer substrate (submicron copper film), copper TEM grid, high-purity copper foil, and small copper block. High-quality aligned copper oxide nanowires can be generated on large scale surfaces of all these samples. For submicron copper films, some randomly distributed hillocks with much longer nanowires on them are observed after heating and gradually cooling process. This result is quite different from the samples under naturally cooling process, and provides a positive view for the fabrication of on-chip copper oxide nanowires with high aspect ratio up to 200〜1000. On the other hand, cooling process does not affect the nanowire growth on copper TEM grids, copper foils, and small copper blocks.
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