Motion estimation using MSD-first processing

Abstract

A new most-significant-digit-first (MSD-first) motion estimation (ME) algorithm based on online arithmetic is proposed in the paper, together with its associated architecture. High-performance ME architectures are crucial for high-quality video applications with high resolution and frame rate, such as HDTV, DVD-video recorders and digital camcorders. The proposed algorithm decomposes the summation of absolute difference (SAD) and the comparison operations of full search block matching (FSBM) into digit level. The digit-level comparisons are interleaved into the separated SAD operations to distinguish the motion vector (MV) as early as possible. It operates in the MSD-first manner and eliminates redundant operations for less significant digits, while still extracting the exact MV of the selected search algorithm. The authors also demonstrate the online arithmetic designs for SAD and comparison, which are two primitive operations in the proposed algorithm. The proposed method saves 47.4% to 64.3% SAD computations of FSBM. In the implementation, a 4×4 array processor of the proposed ME using online arithmetic has a 2.84 ns critical path and 1510 gates with 0.35 μm 1P4 M CMOS cell library. It supports 83 mega 4×4 block matching per second and also reduces the ME operations of other fast search algorithms.