MOSFET modeling and parameter extraction for low temperature analog circuit design

Abstract

SPICE parameters needed for simulation of CMOS readout circuits used in infrared image sensors cooled at low temperature are extracted using a specific MOSFET model based on the EKV 2.6 compact charge model. It is used below 200 K and is very well adapted to analog simulation in weak and moderate inversion regimes. It was successively applied on different CMOS processes from different foundries. The model's performance is demonstrated in this work for a 0.35 μm N + single gate process. Experimental results on the evolution of the low frequency noise and the transistor matching parameters between 300 K and 77 K are also presented. Contrary to the NMOS transistors, the threshold voltage differences of buried channel PMOS transistors are less scattered as the temperature is lowered. The same trend with temperature is observed on the flicker noise parameter.