MOS solar cells for indoor LED energy harvesting: influence of the grating geometry and the thickness of the gate dielectrics

Abstract

This paper discusses the metal-oxide-semiconductor (MOS) solar cells for energy harvesting from indoor light emitting diode (LED) illumination using Al/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Si-p structures. Wafers of the Si-p (100) with a resistivity of 10Ω.cm were used. The gate dielectric was grown by rapid thermal processing (RTP) with thicknesses of 1.65, 1.73, 2.10 and 2.23 nm. The main parameters studied were extracted using electrical characterization through IxV curves of the MOS solar cells with total areas of 3.24 cm2. At first, it was observed an increase of the dark current density from 0.49 to 4.4 μA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for the thickness varying from 1.65 to 2.23 nm. It is worthy of note the increase of the generated power from 8.1 to 46.7 μW/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with the rise of the thickness in the range of 1.65 to 2.23 nm for a constant incident power of 5 mW/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . In this case, the lower the thickness, the higher the tunneling current through the gate dielectrics, which causes the decrease of the depletion region length and this decrease, in turn, makes the generation current density lower in the depletion region. Also, the reduction of the short-circuit current (J <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC</sub> ) due to the increase of the widths (W) and spacings (S) of the fishbone-grating geometry was well-correlated with the decrease of the perimeter (Pe) and the rise of the aspect ratio W/S.