Abstract
We report back gate field-effect transistors (FETs) with few-layered MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> nanosheet controlled by lead-zirconate-titanate (PZT) ferroelectric gating. The MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> transistors with PZT gating (MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -PZT FETs) exhibit reproducible hysteresis and nonvolatile memory behaviors with high stability, which can be attributed to the polarization screening from interface adsorbates and charge dynamic trapping/detrapping into the interface defect states. The ON/OFF states ratios and memory windows have little change with the channel scaling from 2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> to 200 nm, revealing the channel scaling has not obvious influence on MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -PZT FET properties, which suggests MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -PZT FET a promising candidate for future non-volatile memory applications.
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