Abstract

Artificial neural networks could be fabricated in either of the principal integrated circuit technologies - bipolar and MOS. But the rise of interest in the direct implementation of neural networks has come at a time when MOS technology, and CMOS in particular, has become the preferred choice for VLSI. NN’s share with large logic systems the requirements for a very low power dissipation per basic function, a high physical packing density and a capability for complex interconnections. These are features of CMOS VLSI. The technology also provides functions such as analog switches and high-quality capacitance which are exploited in many NN designs. On the other hand, in bipolar technology there are circuit functions which arise out of the properties of pn junctions, such as analog multiplication and precision voltage references. These do not come as easily in MOS, though there are ways of providing the functions. There are also technology options which combine MOS and bipolar devices on the same chip. As would be expected, these are more expensive and tend to be used only where there is a very clear performance advantage.

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