Abstract

The growth of pentacene thin films for applications in thin-film transistors and other organic electronic devices results in a variety of extended structural defects including dislocations, grain boundaries, and stacking faults. We have used scanning tunneling microscopy (STM) to probe the molecular-scale structure of grain boundaries and stacking faults in a pentacene thin film on a Si (001) surface modified with styrene. Styrene/Si (001) substrates produce pentacene films that are structurally similar to those grown on insulating substrates, but which are sufficiently smooth and conductive for STM studies. STM images show two types of grain boundaries: in-plane high-angle tilt grain boundaries at the junctions between pentacene islands, and twist boundaries between molecular layers. Segments of the tilt grain boundaries are faceted along low-energy crystallographic directions. Stacking faults are found in the plane of individual pentacene grains. Two rows of molecules near the stacking fault are shifted along the surface normal by 60 pm. Electronically relevant trap states may thus be associated with stacking faults in pentacene thin films.

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