Abstract

The performance of interfacial thermal transport in heterostructures determines the reliability of micro- and nano-scale devices. In this study, a molecular dynamics methods is used to investigate the interfacial thermal transport properties of graphene/GaN sandwich heterostructure. The effects of temperature, defect, and size on the interface thermal conductance at the heterostructure are analyzed. It is found that the interface thermal conductance increases with temperature; at 1100 K, the interface thermal conductance of the 3-layer graphene heterostructure increases by 61%. This increase is mainly attributed to the enhanced lattice vibrations at higher temperature, which excite more out-of-plane phonons. The presence of minor vacancy defects in GaN leads to an increase in interface thermal conductance, reaching a maximum of 0.0357 GW/(m<sup>2</sup>·K) at the defect rate of 20%. This enhancement is believed to be due to additional thermal transport pathways created by the defects. However, as the defect rate increases further, the interface thermal conductance begins to decrease, which is thought to be due to a reduction in interfacial coupling strength. With an increase in the number of GaN layers from 8 to 24, the interface thermal conductance decreases, the change attributes to a reduction in the number of phonons participating in the thermal transport across the interface. Conversely, increasing the number of graphene layers from 2 to 6 initially increases and then decreases the interface thermal conductance. This behavior is linked to initial improvements in phonon matching and coupling strength, and followed by increases in phonon scattering and localization. The results of this study provide a theoretical basis for the regulation of interfacial thermal transport in microelectronic devices.

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