Abstract
In the last years, remote health monitoring is becoming an essential branch of health care with the rapid development of wearable sensors technology. To meet the demand of new more complex applications and ensuring adequate battery lifetime, wearable sensors have evolved into multicore systems with advanced power-saving capabilities and additional heterogeneous components. In this article, we present an approach that applies optimization and parallelization techniques uncovered by modern ultralow power (ULP) platforms in the SW layers with the goal of improving the mapping and reducing the energy consumption of biomedical applications. Additionally, we investigate the benefit of integrating domain-specific accelerators to further reduce the energy consumption of the most computationally expensive kernels. Using 30-s excerpts of signals from two public databases, we apply the proposed optimization techniques on well-known modules of biomedical benchmarks from the state-of-the-art and two complete applications. We observe speed-ups of 5.17× and energy savings of 41.6% for the multicore implementation using a cluster of 8 cores with respect to single-core wearable sensor designs when processing a standard 12-lead electrocardiogram (ECG) signal analysis. Additionally, we conclude that the minimum workload required to take advantage of parallelization for a heartbeat classifier corresponds to the processing of 3-lead ECG signals, with a speed-up of 2.96× and energy savings of 19.3%. Moreover, we observe additional energy savings of up to 7.75% and 16.8% by applying power management and memory scaling to the multicore implementation of the 3-lead beat classifier and 12-lead ECG analysis, respectively. Finally,by integrating hardware (HW) acceleration we observe overall energy savings of up to 51.3% for the 12-lead ECG analysis.
Highlights
INCREASING healthcare costs [1] and hospital overcrowding call for new technological advances that improve rewhich often are not amenable to per-lead parallelization [7], [11], [14], [15], [17]–[22]
We extend the open-source PULP platform [37] with a CGRA following the design presented in [10] for biomedical applications, which is composed of 16 reconfigurable cells (RCs) forming a 4 × 4 torus interconnect
We have proposed a top-down approach to expose these characteristics to the SW layers via parallelization techniques to improve the mapping of modular biomedical applications
Summary
INCREASING healthcare costs [1] and hospital overcrowding call for new technological advances that improve rewhich often are not amenable to per-lead parallelization [7], [11], [14], [15], [17]–[22]. The main goal of multi-core ultra-low power WSN platforms is reducing energy consumption to maximize battery lifetime, while still running complex algorithms on the nodes. A major obstacle to achieve adequate speed-ups is the overhead gating— due to the power switches and controllers around the power gated area. It is applicable only for large blocks (e.g., a cluster of processors). Modern platforms divide SRAM memories in several banks that can be independently power-gated or set to retention mode according to the amount of memory required at a given moment
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