Abstract
This paper proposes a novel 8X8 bit Modified Booth Dadda Multiplier architecture which is an improved version of Modified Booth Wallace Multiplier. The idea involves the generation of partial products using Modified Booth Algorithm. The addition of these partial products is done using Dadda Tree which is hierarchically divided into two levels. The proposed Modified Booth Dadda Multiplier provides significant reduction in area and complexity in comparison to Modified Booth Wallace Multiplier as Dadda Tree requires less number of half adders and full adders as compared to Wallace Tree. The proposed multiplier has lower ratio of power to area as when size of a multiplier decreases, the ratio of power to area also decreases, due to shorter interconnect lines and decreased glitching. Furthermore to improve the speed of addition at the third level of computation 4-bit Carry Look-Ahead Adder is used which provides better efficiency in terms of area/speed.
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