Abstract
The dynamic element matching (DEM) techniques for digital-to-analog converters (DACs) has been suggested as a promising method to improve matching between the DAC's reference levels. However, no work has so far taken the dynamic effects that limit the performance for higher frequencies into account. In this paper we present a model describing the dynamic properties of a DEM DAC and compare the simulated results with measurements of a 14-bit current-steering DEM DAC implemented in a 0.35-µm CMOS process. The measured data agrees well with the results predicted by the used model. It is also shown that the DEM technique does not necessarily increase the performance of a DAC when dynamic errors are dominating the achievable performance.
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