Abstract
Memristor devices are crucial for developing neuromorphic computers and next-generation memory technologies. In this work, we provide a comprehensive modelling tool for simulating static DC reading operations of memristor crossbar arrays that use passive selectors with matrix algebra in MATLAB. The software tool was parallel coded and optimised to run with personal computers and distributed computer clusters with minimised CPU and memory consumption. We study the effect of changing the line resistance, array size, voltage selection scheme, selector diode’s ideality factor, reverse saturation current and sense resistance on the electrical behaviour and expected sense margin of a conventional one-diode-one-resistor crossbar arrays. We then investigate the effect of single- and dual-side array biasing and grounding on the dissipated current throughout the array cells. The tool we offer to the memristor community and the studies we present enable the design of larger and more practical memristor arrays for application in data storage and neuromorphic computing.
Highlights
Inspired by the brain intelligence and its capability in efficient information processing, recently proposed technologies for realising artificial synapses have widely been based on memristors [1,2,3]
There are two equations that model the current flow through the corresponding word line (WL) and bit line (BL) at every junction
We found that for Is ranging from 10−14 to 10−10 the sense margin peaks around Is = 10−12A at 7.1% for the V/3 scheme, Fig. 10 The IV characteristics of a diode in series with a resistor plotted using Eq 2 shows the shift in threshold voltage as Is (a), (b) and T (c) are changed. d A plot using Eq 3 showing the absolute current of the diode at reverse biasing for different reverse saturation currents
Summary
Inspired by the brain intelligence and its capability in efficient information processing, recently proposed technologies for realising artificial synapses have widely been based on memristors [1,2,3]. The simplicity of crossbar arrays can allow the realisation of high device density in two and three-dimensions whilst enabling low fabrication and production costs [11,12,13,14]. While there have been considerable efforts to model crossbar arrays in the past, in most attempts, the selector device parameters were not included in the models. Most of these crossbar array modelling have been done using the SPICE modelling tool [15,16,17]. Modelling large memory arrays above a megabit requires extensive computational power with SPICE [18]. SPICE is a compact tool that is optimised for modelling electronic circuits, the nature of
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