Modelling and Simulation of Multi-Layered VLSI Interconnects used in High-Speed Communications

Abstract

The major problem in the design and implementation of very high speed communication systems using multichip modules (MCMs) is to control delay and losses in interconnects. Advances in the 1? technology, especially, processing techniques have made it possible to develop ICs to operate at 100 to 150 picosecs. Even, the off-chip circuits can be designed to operate at this high speed. Signal lines are modelled as transmission lines with electrical representative parameters like [R], [L], [C] and [G] in PUL units. In this paper finite element technique has been employed to obtain these parameters. Special singular and infinite elements are used to improve upon the accuracy of the results. Modal analysis technique is applied to obtain time-domain response of these signal lines which are fabricated in multilayer multiconductor configurations. The trapezoidal and inverse trapezoidal cross-section conductors are common due to under-cuts and epitaxial growth processes. Time-domain response of such conductors in multilayer structures is also analysed in this paper.