Modeling Short-Channel Effects in Core–Shell Junctionless MOSFET

Abstract

In this paper, we propose a model for estimating short-channel effects (SCEs) in the shell-doped double-gate junctionless (JL) MOSFET. The main emphasis of this paper is to estimate SCEs by effectively capturing source/drain (S/D) extensions beyond the gate edges for different values of undoped core thickness ( ${T}_{\textsf {core}}$ ), shell doping ( ${N}_{\textsf {d}}$ ), gate length ( ${L}_{\textsf {g}}$ ), and gate ( ${V}_{\textsf {gs}}$ ) and drain ( ${V}_{\textsf {ds}}$ ) biases in subthreshold regime. The threshold voltage ( ${V}_{\textsf {th}}$ ), drain-induced barrier lowering and subthreshold swing ( ${S}$ ), extracted from transfer characteristics, are in good agreement with the simulation results. Results highlight the utility of shell doping and core thickness to provide an additional degree of freedom to control SCEs. The proposed model can be useful in estimating SCEs and optimizing core–shell JL architecture for low-power applications.