Modeling power consumption of 3D MPDATA and the CG method on ARM and Intel multicore architectures

Krzysztof Rojek,Roman Wyrzykowski,Enrique S Quintana-Ortí

doi:10.1007/s11227-017-2020-z

Krzysztof Rojek, Roman Wyrzykowski + Show 1 more

Open Access

https://doi.org/10.1007/s11227-017-2020-z

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Abstract

We propose an approach to estimate the power consumption of algorithms, as a function of the frequency and number of cores, using only a very reduced set of real power measures. In addition, we also provide the formulation of a method to select the voltage–frequency scaling–concurrency throttling configurations that should be tested in order to obtain accurate estimations of the power dissipation. The power models and selection methodology are verified using two real scientific application: the stencil-based 3D MPDATA algorithm and the conjugate gradient (CG) method for sparse linear systems. MPDATA is a crucial component of the EULAG model, which is widely used in weather forecast simulations. The CG algorithm is the keystone for iterative solution of sparse symmetric positive definite linear systems via Krylov subspace methods. The reliability of the method is confirmed for a variety of ARM and Intel architectures, where the estimated results correspond to the real measured values with the average error being slightly below 5% in all cases.

Highlights

Performance analysis has traditionally focused on optimizing the computational throughput of applications and/or reducing their execution time
We contribute toward raising the energy awareness among the scientific community by modeling the impact of voltage–frequency scaling (VFS) and concurrency throttling (CT) on the power dissipation of the multidimensional positive definite advection transport algorithm (MPDATA), a key component that strongly dictates the computational performance as well as the energy consumption of the multiscale fluid model EULAG [24,31]
We have proposed and validated a power consumption model for the MPDATA simulation and conjugate gradient (CG) algorithm on a variety of ARM and Intel CPUs

Summary

Introduction

Performance analysis has traditionally focused on optimizing the computational throughput of applications (from the perspective of a system’s administrator) and/or reducing their execution time (from the point of view of the user). As a result, during the past few years we have been witnesses to a considerable amount of works that aimed to analyze the interaction among temperature–power–time–energy for a variety of applications and simple algorithms. These studies have targeted all sorts of current architectures, including multicore processors, graphics accelerators, many-core processors such as the Intel Xeon Phi or NVIDIA’s GPUs, and clusters assembled using these technologies. One particular aspect that many of these past works address is the use of (dynamic) voltage–frequency scaling (VFS) [10], sometimes combined with (dynamic) concurrency throttling (CT) [7], as a means to reduce power dissipation and/or energy consumption. We include the conjugate gradient (CG) algorithm for the iterative solution of sparse linear systems via Krylov subspaces methods [30]

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