Modeling of temperature dependent parasitic gate turn-on in silicon IGBTs

Abstract

Parasitic turn-on can cause unintentional triggering of the IGBTs since the discharge current of the Miller capacitance coupled with high dV/dt can activate a device that should be off. The short circuit current resulting from parasitic turn-on coupled with the high voltage causes significant power dissipation which can be a reliability issue. This issue is exacerbated by higher ambient temperatures since the negative temperature coefficient of the IGBT's threshold voltage as well as the positive temperature coefficient of the minority carrier lifetime will increase the peak and duration of the short circuit current. Accurate modeling of the shoot-through power and its temperature dependency is important for circuit designers when designing mitigation techniques like multiple resistive paths and bipolar gate drivers. The physics-based model proposed in this paper can produce accurate results with good matching over temperature. The model improves on compact circuit models based on lumped parameters.