Abstract
This paper describes the effect of substrate bias in bulk and SOI SiGe-channel p-MOSFETs. Applying a positive substrate bias to the bulk SiGe p-MOSFETs results in considerable shift of the SiGe channel threshold voltage towards more negative values, and considerable reduction of the saturated SiGe channel hole density, but has negligible effect on the surface channel threshold voltage and hole density. In SOI SiGe p-MOSFETs, the threshold voltages and hole densities are all negligibly affected by the negative substrate bias.
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