Modeling of silicon ingot slicing process by wire–electrical discharge machining

Abstract

Photovoltaic industry requires the cutting of silicon ingots into wafers in order to get minimum kerf loss, to facilitate manufacturing of thin wafers and to provide high productivity. Existing silicon ingot slicing processes like inner diameter saw and abrasive wire cutting have drawbacks of high kerf loss, lower finish and limitation on the thickness of wafer. In order to have economically viable photovoltaic technology, efficiency of wafer manufacturing process needs to be improved. The wire–electrical discharge machining technology is adopted as a new candidate for silicon slicing and is compared with the existing procedures and testified whether it can inevitably substitute the inner diameter saw or even compete with wire saws in some manufacturing orders. The main focus of this article is to understand the effect of processing parameters on the cutting process, so the parametric conditions delivering high slicing rate and low kerf loss can be achieved. Modeling of wire–electrical discharge machining is difficult as it involves several disciplines such as thermodynamics, hydrodynamics, electrodynamics and electromagnetics. Various researchers have proposed analytical models for electrical discharge machining and wire–electrical discharge machining through the use of electrothermal concepts. However, a comprehensive model that predicts the erosion rate in wire–electrical discharge machining process is needed. This article considers moving the line heat source nature of the wire to predict the temperature profiles of the workpiece in order to calculate the erosion rate. The results thus obtained have been analyzed experimentally, and conclusions have been derived enabling a better understanding of future research prospects and applications.